Science Fair Project Encyclopedia
In computing, a double pumped computer bus transfers data on both the rising and falling edges of the clock signal, effectively doubling the data transmission rate without having to deal with the additional problems of timing skew that increasing the number of data lines would introduce. This is also known as dual-pumped, double data rate, and double transition.
For some applications, even double pumping has proven insufficient and quad pumping has been used; transferring data four times per clock. DDR-II RAM and the Pentium 4 front side bus both use this technique.
It is often difficult to know how to refer to the speed of a double-pumped bus. Some people talk about the speed of the clock signal and some people prefer to refer to the number of transfers per second. It is less ambiguous to discuss the raw bandwidth of a bus as this also takes into account the width of the bus: thus DDR SDRAM that runs on a clock of 100MHz, with data transfer at 200MHz, is called DDR200 and PC1600, referring to the bandwidth. However, this does not take into account the bus protocol overhead or latencies, both of which can reduce the effective bandwidth of a bus to a fraction of the raw bandwidth.
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